schematic_from_netlist
Convert a SPICE netlist into an LTspice schematic by grid-placing supported components and labeling nets. Directives are preserved; unsupported elements are returned for manual placement.
Instructions
Generate an .asc schematic from SPICE netlist text. Parses the netlist, grid-places each supported component (R/C/L/V/I/D) on its LTspice symbol, and connects pins by net label (FLAGs carrying the node name) so the result is electrically identical to the netlist — no manual pin-by-pin placement. Directives (.model/.tran/.ac/.param/.meas/...) are carried over. Multi-terminal / controlled / subcircuit elements (M, Q, J, X, E, G, F, H) can't have their symbol inferred from the instance line and are returned in skipped for manual placement. Round-trips through read_circuit. Connection is label-based, not routed wires, so the layout is functional rather than pretty.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| name | Yes | Output file name without the .asc extension | |
| content | Yes | SPICE netlist text. Supported elements (R/C/L/V/I/D) are placed on a grid and wired by net label; per SPICE convention the first non-blank line is treated as the deck title and ignored. Directives (.model, .tran, .ac, .param, .meas, ...) are carried over verbatim. | |
| overwrite | No | Overwrite an existing file at this path. Default is to refuse. | |
| format | No | Response format: 'json' for structured data, 'text' for human-readable |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
| file | No | ||
| placed | No | ||
| components | No | ||
| skipped | No | ||
| directive_count | No | ||
| nets | No | ||
| warnings | No | ||
| validation_warnings | No |