"DNS Doctor" matching MCP servers:

MCP server for NetCraze routers enabling management of static DNS hosts, system info, network interfaces, and other router features via Cursor and MCP clients.

Enables AI agents like Claude Code and Cursor to drive a locally installed Xilinx Vivado safely through 32 curated tools covering synthesis, implementation, timing, CDC, XDC, IP, waveforms, and device programming. It provides structured timing evidence, baseline comparison, offline VCD queries, diagnostic prompts, and doctor-based environment self-checks for the full FPGA workflow.

Enables AI coding agents such as Claude Code, Cursor, and Codex to drive a locally installed Xilinx Vivado across the full FPGA flow, with tools for sessions, synthesis, implementation, timing, CDC, XDC, IP, waveform querying, and device programming. It also provides structured timing evidence with baseline comparison, offline VCD analysis, evidence-driven workflow prompts, and a read-only doctor for environment self-checks.

Enables AI coding agents such as Claude Code, Cursor, and Codex to safely drive a locally installed Xilinx Vivado through 32 curated tools covering sessions, synthesis, implementation, timing and CDC analysis, XDC/IP debugging, offline VCD waveform queries, and device programming. It provides structured timing evidence with baseline comparison, evidence-driven workflow prompts, environment self-checks via doctor, and Chinese-language diagnostics for CRITICAL WARNINGs and timing issues.

Enables AI coding agents such as Claude Code, Cursor and Codex to safely drive a locally installed Xilinx Vivado through 32 curated tools covering GUI/Tcl/attach sessions, synthesis, implementation, timing, CDC, XDC, IP, waveform queries and device programming. Adds evidence-driven workflow prompts, a read-only environment doctor with optional guarded fixes, structured timing and IO report parsing with baseline comparison, and Chinese-language diagnostics for CRITICAL WARNINGs.

Enables AI coding agents to safely drive a locally installed Xilinx Vivado across the full FPGA flow, from session control and Tcl execution through synthesis, implementation, timing/CDC/XDC analysis, IP inspection, waveform queries, and device programming. Ships curated tools, evidence-driven workflow prompts, and a read-only environment doctor that provides structured reports and Chinese diagnostics for critical warnings.