Analyze a Logisim-evolution project
logisim_analyze_designParse Logisim .circ XML into project, circuit, pin, clock, and conversion-loss summaries for static design analysis.
Instructions
Parses bounded .circ XML into project, circuit, pin, clock, component, and explicit conversion-loss summaries. Static parsing is not simulation evidence.
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| path | Yes | Workspace-relative .circ project ref | |
| circuit | No | Circuit name; defaults to the declared main circuit | |
| expectedProjectDigest | No | Optional sha256: digest from a prior cross-model handoff |
Output Schema
| Name | Required | Description | Default |
|---|---|---|---|
| ok | Yes | ||
| data | No | ||
| error | No | ||
| context | Yes | ||
| summary | Yes | ||
| diagnostics | Yes | ||
| nextActions | Yes | ||
| contractVersion | Yes |