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dvd?e d@e$dAe dBe dCe dDe dEe dFe%de fdGdH��Z&e � � J ( M O PdwdQe dBe dCe dDe dEe dRe dSe dTe dUe dVe dWe de fdXdY��Z'e � � dxd[e de fd\d]��Z(e � � de fd^d_��Z)e � � de fd`da��Z*e � � cdydde dee dfe dge dhe die dje dke%dle de fdmdn��Z+e � � de fdodp��Z,e-dqk�rzedr� edse� �� e �.� dS dS )z� N)�FastMCP)�Dict�designs�MetalGUI)�
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dt| �� �W Y d} ~ S d} ~ ww )a� Initialize the Qiskit Metal planar design and GUI.
This is the first function you should call when starting a new quantum circuit design.
It creates a new DesignPlanar object that serves as the foundation for all subsequent
component additions (qubits, transmission lines, etc.).
Returns:
Success message with confirmation that the design was initialized,
or error message if Qiskit Metal is not available or initialization fails.
Prerequisites:
- Qiskit Metal must be installed and available
Example usage:
Call this before any other design operations to set up the workspace.
�[ ❌ Error: Qiskit Metal is not available. Please install qiskit-metal and its dependencies.Tu$ ✓ Design initialized successfully.u ❌ Error creating design: N)�QISKIT_METAL_AVAILABLEr r �design�overwrite_enabled� Exception�str��er
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create_design% s ��r! �0.5um�0.3um�9mm�6.5mm� cpw_width�cpw_gap� chip_size_x� chip_size_yc
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dt|�� �W Y d}~S d}~ww )aI Set basic design variables for coplanar waveguide (CPW) geometry and chip dimensions.
Configures the CPW parameters and chip size that will be used throughout the design.
These variables affect the impedance and performance characteristics of all
transmission lines and interconnects in the quantum circuit.
Args:
cpw_width: Center conductor width (default: '0.5um')
cpw_gap: Gap between center conductor and ground plane (default: '0.3um')
chip_size_x: Chip width dimension (default: '9mm')
chip_size_y: Chip height dimension (default: '6.5mm')
Returns:
Success message confirming the variables were set with their values,
or error message if no design exists or operation fails.
Prerequisites:
- Must call create_design() first
Note:
Default values are reasonable for superconducting quantum circuits.
Adjust based on your specific fabrication process and design requirements.
CPW impedance is determined by width/gap ratio and substrate properties.
�) ❌ Error: Qiskit Metal is not available.N�% ❌ Please run create_design() first.r& r' �main�size�size_x�size_yu$ ✓ Design variables set: cpw_width=z
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��r4 �Q1�Q2�425um�250um�650um�450um�-2.5mm�0mm�+2.5mm�30um�10um�q1_name�q2_name� pad_width�
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C s� t sdS tdu r
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dt| �� �W Y d} ~ S d} ~ ww )a, Add two customizable transmon pocket qubits to the quantum circuit design.
Creates two transmon qubits with fully customizable parameters including
dimensions, positions, and electrical properties. Transmons are the most
common type of superconducting qubit, consisting of a Josephson junction
shunted by a large capacitor formed by the pads.
Args:
q1_name: Name for the first qubit (default: 'Q1')
q2_name: Name for the second qubit (default: 'Q2')
pad_width: Width of main capacitor pads (default: '425um')
pad_height: Height of main capacitor pads (default: '250um')
pocket_width: Width of protective ground pocket (default: '650um')
pocket_height: Height of protective ground pocket (default: '450um')
q1_pos_x: X position of first qubit (default: '-2.5mm')
q1_pos_y: Y position of first qubit (default: '0mm')
q2_pos_x: X position of second qubit (default: '+2.5mm')
q2_pos_y: Y position of second qubit (default: '0mm')
pad_gap: Gap between capacitor pads (default: '30um')
inductor_width: Width of inductive shunt (default: '10um')
Connection pads:
Each qubit has two connection pads:
- 'a': Right side connection pad
- 'b': Left side connection pad
Returns:
Success message confirming both qubits were added to the design,
or error message if prerequisites not met or creation fails.
Prerequisites:
- Must call create_design() first
- Qiskit Metal must be available
Note:
Default positioning places qubits 5mm apart to minimize unwanted coupling
while allowing controlled interaction through coupling elements.
Pad dimensions affect qubit frequency and coupling strength.
r* Nr+ � r )�loc_W�loc_H�����)�a�b) rB rC rD rE rJ rK �connection_pads�pos_x�pos_y��optionsu
✓ Transmon z and z added to design at positions (r0 z) and (r1 u ❌ Error creating transmons: )r r r �dictr r )
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SpiralCoupler� �0.2mm�0.02mm�0� coupler_name�n_turns�spacing�width� orientationrS rT �subtractc C s� t sdS tdu r
dS z$tt| t||||||t|��� d�d� d| � d|� d|� d |� d
� W S tyG } z
d t|�� �W Y d}~S d}~ww ) a) Add a customizable square spiral inductor coupler to the quantum circuit design.
Creates an N-turn square spiral inductor that provides controlled magnetic
coupling between qubits or other circuit elements. This type of coupler
enables two-qubit gate operations by providing tunable interaction strength
through mutual inductance.
Args:
coupler_name: Name for the spiral coupler component (default: 'SpiralCoupler')
n_turns: Number of spiral turns (default: 3)
spacing: Spacing between spiral traces (default: '0.2mm')
width: Width of spiral traces (default: '0.02mm')
orientation: Rotation angle in degrees (default: '0')
pos_x: X position of spiral center (default: '0mm')
pos_y: Y position of spiral center (default: '0mm')
subtract: Whether to subtract from ground plane (default: False)
The spiral geometry maximizes coupling strength while maintaining a compact
footprint. Coupling strength depends on proximity to qubits and can be tuned
by adjusting position, size, or number of turns.
Returns:
Success message confirming the spiral coupler was added with specifications,
or error message if prerequisites not met or creation fails.
Prerequisites:
- Must call create_design() first
- Qiskit Metal must be available
Note:
More turns increase inductance but also increase size and parasitic effects.
Typical values: 2-10 turns, 0.1-0.5mm spacing, 10-50um trace width.
r* Nr+ )�nr` ra rb rS rT rc rU u ✓ Square spiral coupler 'z
' added with z turns at (r0 r1 u ❌ Error adding coupler: )r r r rW r �lowerr ) r^ r_ r` ra rb rS rT rc r r
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junction_name�pad_lower_width�pad_lower_height�finger_lower_width�finger_lower_height� extension�layerc C s� t sdS tdu r
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a� Add a customizable Josephson junction using the Manhattan geometry model.
Creates a Josephson junction with the Manhattan design, which features
rectangular geometry suitable for standard fabrication processes.
Josephson junctions are the fundamental nonlinear element in superconducting
quantum circuits, providing the anharmonicity necessary for qubit operation.
Args:
junction_name: Name for the junction component (default: 'JJ1')
width: Overall junction width (default: '0.01mm')
orientation: Rotation angle in degrees (default: '90')
pos_x: X position of junction center (default: '0mm')
pos_y: Y position of junction center (default: '0mm')
pad_lower_width: Width of lower junction pad (default: '5um')
pad_lower_height: Height of lower junction pad (default: '2um')
finger_lower_width: Width of junction constriction (default: '0.2um')
finger_lower_height: Height of junction constriction (default: '4um')
extension: Extension length of junction (default: '0.2um')
layer: Fabrication layer number (default: '1')
The Manhattan model uses rectangular pads with a narrow constriction to form
the tunnel junction. Junction dimensions directly affect the critical current
and charging energy, which determine qubit frequency and anharmonicity.
Returns:
Success message confirming the Josephson junction was added with specifications,
or error message if prerequisites not met or creation fails.
Prerequisites:
- Must call create_design() first
- Qiskit Metal must be available
Note:
In real devices, junctions are typically integrated into transmon structures.
Standalone junctions are useful for analysis or specialized circuit elements.
Critical current scales approximately with junction area.
r* Nr+ )
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r �add_josephson_junction s, -
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��rx �./quantum_design.gds� export_pathc
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�nd*� d+� }|W S t�y� } zd,t|�� d-�W Y d}~S d}~ww ).a� Export the current quantum circuit design to a GDS (Graphic Database System) file.
GDS is the industry standard file format for integrated circuit layouts and
photolithography masks. This export enables fabrication of the designed
quantum circuit using standard semiconductor manufacturing processes.
Export configuration:
- Robust GDS renderer initialization and configuration
- Design validation and rebuild before export
- Cross-platform path handling with proper validation
- Enhanced error handling and informative feedback
- Output format: GDS II binary format
Args:
export_path: File path for the output GDS file (default: "./quantum_design.gds")
Returns:
Success message with absolute path to the exported file and component summary,
or detailed error message if prerequisites not met or export fails.
Prerequisites:
- Must call create_design() first
- Design should contain components (qubits, transmission lines, etc.)
- Qiskit Metal must be available
- Write permissions for the specified path
Note:
This implementation properly initializes the GDS renderer, validates the design,
and rebuilds it before export to ensure all components are properly rendered.
The exported GDS file can be imported into layout tools like KLayout or Cadence.
r Nu< ❌ Please run create_design() first to initialize a design.ry z.gdsT)�exist_okz.temp�w�testu! ❌ Error: Cannot write to path 'z '. Check permissions. Details: �
componentsr ut ❌ Warning: Design contains no components. Add some components (qubits, transmission lines, etc.) before exporting.u+ ❌ Error rebuilding design before export: z). The design may have invalid components.�
path_filenameg @�&check_short_segments_by_scaling_fillet�True� short_segments_to_not_fillet� precisiong��&� .>�unitg�����ư>uT ❌ Error: GDS renderer not properly initialized. Design may be corrupted. Details: u ❌ Error during GDS export: z". Alternative method also failed: u( ❌ Error: GDS file was not created at 'z#'. Export may have failed silently.uV ❌ Error: GDS file was created but is empty. Design may not have exportable geometry.i u@ ✓ Design successfully exported to GDS!
File Details:
Path: z
Size: z.2fz MB (�,z) bytes)
Design Summary:
Components: z
Component List: r0 �Noneuk
Export Settings:
Precision: 1 nm
Units: 1 μm
Fillet scaling: 2.0x
Short segments handling: Enabled
Next Steps:
1. Open the GDS file in KLayout, Cadence, or similar layout tool
2. Verify the geometry renders correctly
3. Run design rule checks (DRC) for your fabrication process
4. Generate process-specific masks and submit for fabricationu( ❌ Unexpected error during GDS export: z). Please check your design and try again.) r r �stripre �endswith�os�path�abspath�dirname�exists�makedirs�open�write�remove�OSError�IOErrorr �hasattr�lenr~ �rebuildr � renderers�gdsrV �AttributeError�
export_to_gds�
render_design�getsize�list�keys�join)rz �abs_export_path�
export_dir� test_file�fr �
rebuild_error� gds_renderer�
attr_error� export_error�alt_export_error� file_size�component_count�component_names� file_size_mb�success_messager
r
r �export_design_to_gds� s� # �"�� ��
� ��2�� ���
����� ��r� c
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d t
|�� �W Y d}~S d}~ww ) a Retrieve comprehensive information about the current quantum circuit design.
Returns a detailed summary of the design state including:
- List of all components (qubits, transmission lines, couplers, junctions, etc.)
- Design variables (CPW width, gap, and other global parameters)
- Design name and class type
- Current design status
This function is useful for:
- Debugging design issues
- Verifying component additions
- Documenting design parameters
- Checking design state before export operations
Returns:
Formatted string containing complete design information,
or error message if no design exists or information cannot be retrieved.
Prerequisites:
- Must call create_design() first
- Qiskit Metal must be available
Note:
The component list shows all successfully added elements.
If a component is missing from the list, it may not have been
properly created or an error occurred during its addition.
r* Nu< ❌ No design created yet. Please run create_design() first.uF
✓ Current Design Information:
========================
Components: r0 r� z
Variables: z
Design Name: z
Design Class: z
u ❌ Error getting design info: )r r r� r~ r� rW r2 r� �name� __class__r r� r r )r~ r2 �infor r
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r �get_design_info< s*
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C sB zda daW dS ty } z
dt| �� �W Y d} ~ S d} ~ ww )a Clear the current design and reset to initial state for starting fresh.
This function performs a complete reset of the design workspace by:
- Removing all components (qubits, transmission lines, couplers, etc.)
- Clearing design variables and settings
- Resetting the GUI state (if applicable)
- Freeing memory used by the current design
Use this function when you want to:
- Start a completely new design from scratch
- Clear a corrupted or problematic design state
- Reset after testing or experimentation
- Free up memory from large designs
Returns:
Success message confirming the design was cleared,
or error message if clearing operation fails.
Prerequisites:
- None (can be called at any time)
Note:
This operation is irreversible! Make sure to export your design
to GDS or save it before clearing if you want to preserve the work.
After clearing, you must call create_design() again to start working.
Nu ✓ Design cleared successfully.u ❌ Error clearing design: )r �guir r r r
r
r � clear_designr s ��r� �0um�90um�component_name�
component1�pin1�
component2�pin2�length� asymmetry�flip�filletc
C s� t sdS tdu r
dS z@t|dtt||d�t||d�d�|d�} t� | _|| j_|r+dnd | j_tt| | �}
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dt| �� �W Y d} ~ S d} ~ ww )a Connect any two component pins with a meandered coplanar waveguide (CPW) transmission line.
This is a generalized connection function that creates flexible routing between
any components in the quantum circuit using meandered (zigzag) CPW geometry.
The meander pattern allows for precise length control and compact routing.
Args:
component_name: Name for the new CPW route (must be unique in design)
component1: Name of the first component to connect
pin1: Pin name on the first component (e.g., 'a', 'b', 'coupling_out')
component2: Name of the second component to connect
pin2: Pin name on the second component (e.g., 'a', 'b', 'coupling_in')
length: Total electrical length of the meandered line (e.g., '2mm', '500um')
asymmetry: Offset for meander pattern asymmetry (default: '0um')
flip: Whether to flip the lead direction (default: False)
fillet: Radius for rounded corners to improve fabrication (default: '90um')
Key features:
- Automatic routing between any two pins
- Precise length control for timing/phase requirements
- HFSS wire bond compatibility for electromagnetic simulation
- Configurable meander pattern for compact layouts
Returns:
Success message with connection details,
or error message if components don't exist or connection fails.
Prerequisites:
- Must call create_design() first
- Both components must exist in the design
- Specified pins must exist on the components
- Qiskit Metal must be available
Example usage:
connect_components('Q1_Q2_link', 'Q1', 'a', 'Q2', 'b', '1.5mm')
connect_components('readout_line', 'Q1', 'b', 'resonator', 'input', '800um', flip=True)
r* Nr+ T)� component�pin)� start_pin�end_pin)r� �hfss_wire_bonds�
pin_inputs� total_length�true�falseu ✓ Connected �.z to z with meandered CPW 'z ' (length: �)u! ❌ Error connecting components: ) r r �QDict�meanderr� �lead_direction_invertedr
r r ) r� r� r� r� r� r� r� r� r� � myoptions�router r
r
r �connect_components� s: *���� ,��r� c C s� dt rdnd� dtdurdnd� d�} tdurDz ttj�� �}| d t|�� d
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�7 } W | �� S | d7 } Y | �� S | �� S )a# Check the comprehensive status of the Qiskit Metal MCP server and current design.
Provides a complete health check and status report including:
- Qiskit Metal installation status and availability
- Current design state (created/not created)
- Component count and list of all components in the design
- Server readiness for design operations
This function is useful for:
- Troubleshooting connection or installation issues
- Verifying server state before starting design work
- Monitoring design progress and component count
- Debugging when operations fail unexpectedly
Returns:
Formatted status report with all relevant information,
including any error conditions or missing dependencies.
Prerequisites:
- None (can be called at any time)
Note:
This is a read-only operation that doesn't modify the design.
If Qiskit Metal shows as unavailable, check your installation
and ensure all dependencies are properly installed.
u_
🔍 Qiskit Metal MCP Server Status:
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Qiskit Metal Available: u ✓ Yesu ❌ Noz
Current Design: Nu ✓ Createdu ❌ Not created�
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r� �__main__u, 🚀 Starting Qiskit Metal FastMCP Server...u 📊 Qiskit Metal Available: )r" r# r$ r% ) r5 r6 r7 r8 r9 r: r; r< r= r< r> r? )rY rZ r[ r\ r] r< r< F) rg rh ri r< r< rj rk rl rm rl rn )ry )r� Fr� )/r� �fastmcpr � qiskit_metalr r� r r �3qiskit_metal.qlibrary.sample_shapes.n_square_spiralr �,qiskit_metal.qlibrary.qubits.transmon_pocketr �)qiskit_metal.qlibrary.qubits.JJ_Manhattanr �*qiskit_metal.qlibrary.tlines.straight_pathr �&qiskit_metal.qlibrary.tlines.meanderedr
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