Route the board
route_boardRoute under the project's rules and net classes. By default (no nets, no router, none of the single-route options below) it runs the full route pipeline Koppar benchmarks: the learned router on the whole board, repair rounds on what stays open, copper finishing (0/45/90 runs) and one repair round after it, inside one wall-clock cap: time_budget_s is that cap (default 1200, up to 1500), so the job runs up to about 20 minutes: follow it with get_board_job. The result gives the final unconnected items and DRC errors and a pipeline summary: the counts after the route and after each finish, whether the copper finishing was kept. preserve_existing unset keeps the copper of a board that has tracks or vias and routes a board without any from scratch; false routes every net again. nets, router, or any single-route option (pours, rule overrides, ml_options, seed_existing, pairs_first, class_vias) runs ONE route with that router instead, for expert control: nets limits it to those nets; preserve_existing (default true) keeps every track and via already on the board and routes only what is still open. pours: "keep" (the default when the board has zones) keeps the board's zones and routes every net as tracks. Rule overrides apply to this run only. The learned router takes its via discipline in ml_options. A single route takes time_budget_s (default 120, up to 900).
Input Schema
| Name | Required | Description | Default |
|---|---|---|---|
| nets | No | Net names; * and ? wildcards, e.g. ["USB_D*", "+3V3"]. | |
| pours | No | ||
| router | No | Unset: the full pipeline (above) on the whole board, "ml" for nets. "ml": the learned router service alone, 1 to 8 layers; the time budget is its deadline. Nets outside the nets scope, and with preserve_existing the nets their copper already connects, keep that copper and everything else is routed around it (partial copper of a routed net is replaced). | |
| wait_s | No | Seconds to wait for the job (default 55). A job still running comes back with status "running": follow it with get_board_job. A job is allowed the time its budget asks for (time_budget_s, total_budget_s, rounds), and survives a server restart (the op starts over from its snapshot; route_board's pipeline goes on from its last finished stage). | |
| compact | No | true: the densest via the rules allow (0.4/0.2), which JLCPCB prices with a mandatory 4-wire Kelvin test (~$40 per order); false: never below the Kelvin-free 0.45/0.2. Unset: compact only on a board with an area-array package or vias in pads. | |
| design_id | Yes | The design id returned by import_kicad_project or list_designs. | |
| class_vias | No | Route with the Default class's via. Without it (and without via_diameter_mm) a route uses the board's smallest legal via where the class's is larger. | |
| ml_options | No | Fields passed to the learned router service as they are (router "ml"): via_cost and via_cost_hi (prices in lattice cells; a move costs 1 and the served default via is 8, 12 while a net is on the quality ladder), ql_release (rejected rip trades before a net drops to via_cost, 0 never), endgame_release (false keeps failing nets at via_cost_hi), economy_via_mm (a via counts as this many mm in the economy pass, default 2), guide_via_w (per-cell via price from the model's via channel), plane_cost (signal copper on a poured layer, per cell), pair_w, guide_w, ripup, seed_offset, via_economy_victims (default 4; 8 trades harder), first_nets (globs routed before everything else: buses that span several connectors), draws (client-side: route this many seeded draws and keep the one that connects most then uses fewest vias; the tie-breaks alone move a 500-via board by about 8 vias), stitch_poured (false: no stitch via for a pad already on a layer poured with its net, GND pads on F/B), stitch_cluster_mm (join same-layer pads of a poured net within this reach by short traces and via once per cluster; 4 wins, 8 loses), stitch_cluster_nets (globs: which poured nets cluster), draw_open_penalty (client-side: vias an open net costs when draws are compared, default 0 = the most-connected draw always wins), layer_cost (per-cell price on named layers, {"F.Cu": 2}: the pour polish prices every layer but the plane's). | |
| pairs_first | No | Route the differential pairs (USB D+/D-, CAN H/L, X_P/X_N) alone first, then everything else around them: a port pad row only lets a pair out before the neighbours take its lane. | |
| clearance_mm | No | ||
| via_drill_mm | No | ||
| vias_in_pads | No | 'forbid' (default): no via inside an SMD pad under 2 mm. 'allow': vias may sit in pin pads, for a board ordered with filled and capped vias (JLCPCB POFV); dense connector rows close that otherwise stay open. | |
| seed_existing | No | ML router: the connected nets in scope are sent as their own routes (seed_copper) and the service reworks the finished board with its rip-up and via-economy passes; kept only when KiCad counts fewer vias. Scope nets to the routed signal nets (pour nets stay). | |
| time_budget_s | No | The full pipeline's wall-clock cap (default 1200), or a single route's budget (default 120, up to 900). | |
| track_width_mm | No | ||
| via_diameter_mm | No | ||
| edge_clearance_mm | No | ||
| preserve_existing | No |